Width

7.62 mm

Family

ACT

Length

31.915 mm

HTS Code

8542.39.00.01

Max I(ol)

0.024 A

Pin Count

24

Rohs Code

Yes

Popularity

81

Technology

CMOS

Subcategory

FF/Latches

JESD-30 Code

R-PDIP-T24

Package Code

DIP

Trigger Type

POSITIVE EDGE

JESD-609 Code

e3

Logic IC Type

BUS DRIVER

Package Shape

RECTANGULAR

Package Style

IN-LINE

Surface Mount

NO

Terminal Form

THROUGH-HOLE

Number of Bits

9

Power Supplies

5 V

Terminal Pitch

2.54 mm

Number of Ports

2

Output Polarity

TRUE

Terminal Finish

MATTE TIN

Part Package Code

DIP

Seated Height-Max

5.08 mm

Temperature Grade

INDUSTRIAL

Terminal Position

DUAL

Additional Feature

WITH CLEAR AND CLOCK ENABLE

Source Content uid

74ACT823SPC

Number of Functions

1

Number of Terminals

24

Package Description

DIP, DIP24,.3

Part Life Cycle Code

Obsolete

Qualification Status

Not Qualified

Load Capacitance (CL)

50 pF

Max Frequency@Nom-Sup

109000000 Hz

Package Body Material

PLASTIC/EPOXY

Reach Compliance Code

unknown

Output Characteristics

3-STATE

Propagation Delay (tpd)

10.5 ns

Package Equivalence Code

DIP24,.3

Operating Temperature-Max

85°C

Operating Temperature-Min

-40°C

Supply Voltage-Max (Vsup)

5.5 V

Supply Voltage-Min (Vsup)

4.5 V

Supply Voltage-Nom (Vsup)

5 V