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74ALVCH16500DGG
2966 In Stock
74ALVCH16500DGG
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Manufacturer No:
Nexperia
Manufacturer:
Nexperia
Category:
Transceivers
Package:
TSSOP56 (SOT364-1)
Datasheet:
Description Differential:
18-bit universal bus transceiver; 3-state - The 74ALVCH16500 is an 18-bit universal transceiver with bus hold inputs and 3-state outputs. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CPAB is held at a HIGH or LOW logic level. If LEAB is LOW, the A-bus data is stored in the latch/flip-flop on the HIGH-to-LOW transition of CPAB. When OEAB is HIGH, the outputs are active. When OEAB is LOW, the outputs are in the high-impedance state. Data flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA. The output enables are complimentary (OEAB is active HIGH, and OEBA is active LOW). This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
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Type
DESCRIPTION
Status
Active
Marking
ALVCH16500
Package
TSSOP56 (SOT364-1)
Packing
SOT364-1_118
Nr of bits
18
Package name
TSSOP56
Chemical content
74ALVCH16500DGG
Package information
SOT364-1
t<sub>pd</sub> (ns)
2.9
Orderable part number
74ALVCH16500DGG:11
T<sub>amb</sub> (°C)
-40~85
V<sub>CC(A)</sub> (V)
n.a.
V<sub>CC(B)</sub> (V)
n.a.
f<sub>max</sub> (MHz)
150
Logic switching levels
TTL
Reflow-/Wave soldering
SSOP-TSSOP-VSO-WAVE
Output drive capability (mA)
± 24
Power dissipation considerations
low
Orderable part number, (Ordering code (12NC))
74ALVCH16500DGG:11(935262542118)
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