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CD74HC112PWRG4
1870 In Stock
CD74HC112PWRG4
$0.64
Manufacturer No:
Texas Instruments
Manufacturer:
Texas Instruments
Category:
FF/Latches
Package:
TSSOP
Description Differential:
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-TSSOP -55 to 125
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Type
DESCRIPTION
Width
4.4 mm
Family
HC/UH
Length
5 mm
HTS Code
8542.39.00.01
fmax-Min
23 MHz
Max I(ol)
0.004 A
Pin Count
16
Rohs Code
Yes
Brand Name
Texas Instruments
Popularity
10
Technology
CMOS
JESD-30 Code
R-PDSO-G16
Package Code
TSSOP
Trigger Type
NEGATIVE EDGE
JESD-609 Code
e4
Logic IC Type
J-K FLIP-FLOP
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Surface Mount
YES
Terminal Form
GULL WING
Number of Bits
2
Packing Method
TR
Terminal Pitch
0.65 mm
Output Polarity
COMPLEMENTARY
Terminal Finish
NICKEL PALLADIUM GOLD
Part Package Code
TSSOP
Seated Height-Max
1.2 mm
Temperature Grade
MILITARY
Terminal Position
DUAL
Source Content uid
CD74HC112PWRG4
Number of Functions
2
Number of Terminals
16
Package Description
TSSOP, TSSOP16,.25
Part Life Cycle Code
Obsolete
Qualification Status
Not Qualified
Load Capacitance (CL)
50 pF
Max Frequency@Nom-Sup
20000000 Hz
Package Body Material
PLASTIC/EPOXY
Reach Compliance Code
compliant
Propagation Delay (tpd)
265 ns
Package Equivalence Code
TSSOP16,.25
Operating Temperature-Max
125°C
Operating Temperature-Min
-55°C
Supply Voltage-Max (Vsup)
6 V
Supply Voltage-Min (Vsup)
2 V
Supply Voltage-Nom (Vsup)
4.5 V
Moisture Sensitivity Level
1
Peak Reflow Temperature (Cel)
260
Time@Peak Reflow Temperature-Max (s)
30
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