Width

4.4 mm

Family

LV/LV-A/LVX/H

Length

5 mm

HTS Code

8542.39.00.01

Max I(ol)

0.006 A

Pin Count

14

Rohs Code

No

Popularity

1

Technology

CMOS

Pbfree Code

No

Subcategory

Gates

JESD-30 Code

R-PDSO-G14

Package Code

TSSOP

JESD-609 Code

e0

Logic IC Type

NAND GATE

Package Shape

RECTANGULAR

Package Style

SMALL OUTLINE, THIN PROFILE, SHRINK PITCH

Surface Mount

YES

Terminal Form

GULL WING

Packing Method

TR

Power Supplies

3.3 V

Terminal Pitch

0.65 mm

Schmitt Trigger

YES

Terminal Finish

TIN LEAD

Number of Inputs

2

Part Package Code

TSSOP

Seated Height-Max

1.1 mm

Temperature Grade

INDUSTRIAL

Terminal Position

DUAL

Source Content uid

HD74LV132ATELL

Number of Functions

4

Number of Terminals

14

Package Description

TSSOP, TSSOP14,.25

Prop. Delay@Nom-Sup

17.5 ns

Part Life Cycle Code

Active

Qualification Status

Not Qualified

Load Capacitance (CL)

50 pF

Package Body Material

PLASTIC/EPOXY

Reach Compliance Code

compliant

Propagation Delay (tpd)

23 ns

Package Equivalence Code

TSSOP14,.25

Operating Temperature-Max

85°C

Operating Temperature-Min

-40°C

Supply Voltage-Max (Vsup)

5.5 V

Supply Voltage-Min (Vsup)

2 V

Supply Voltage-Nom (Vsup)

2.5 V