Width

5.5 mm

Family

LV/LV-A/LVX/H

Length

10.06 mm

HTS Code

8542.39.00.01

Max I(ol)

0.006 A

Pin Count

14

Rohs Code

Yes

Popularity

11

Technology

CMOS

Pbfree Code

Yes

Subcategory

Gates

JESD-30 Code

R-PDSO-G14

Package Code

SOP

JESD-609 Code

e4

Logic IC Type

OR GATE

Package Shape

RECTANGULAR

Package Style

SMALL OUTLINE

Surface Mount

YES

Terminal Form

GULL WING

Packing Method

TR

Terminal Pitch

1.27 mm

Schmitt Trigger

NO

Terminal Finish

NICKEL PALLADIUM GOLD

Number of Inputs

2

Part Package Code

SOIC

Seated Height-Max

2.2 mm

Temperature Grade

INDUSTRIAL

Terminal Position

DUAL

Source Content uid

HD74LV32AFPEL-E

Number of Functions

4

Number of Terminals

14

Package Description

SOP, SOP14,.3

Prop. Delay@Nom-Sup

13 ns

Part Life Cycle Code

Not Recommended

Qualification Status

Not Qualified

Load Capacitance (CL)

50 pF

Package Body Material

PLASTIC/EPOXY

Reach Compliance Code

compliant

Propagation Delay (tpd)

19 ns

Package Equivalence Code

SOP14,.3

Operating Temperature-Max

85°C

Operating Temperature-Min

-40°C

Supply Voltage-Max (Vsup)

5.5 V

Supply Voltage-Min (Vsup)

2 V

Supply Voltage-Nom (Vsup)

2.5 V

Moisture Sensitivity Level

1