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SN74ALS113ADR

1865 In Stock

SN74ALS113ADR

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Manufacturer No:

Texas Instruments

Manufacturer:

Texas Instruments

Category:

FF/Latches

Package:

Datasheet:

Description Differential:

Dual J-K Negative-Edge-Triggered Flip-Flops With Preset 14-SOIC 0 to 70

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    Type

    DESCRIPTION

    Width

    3.9 mm

    Family

    ALS

    Length

    8.65 mm

    HTS Code

    8542.39.00.01

    Objectid

    1419791412

    fmax-Min

    30 MHz

    Pin Count

    14

    Risk Rank

    9.8

    Rohs Code

    No

    Brand Name

    Texas Instruments

    Technology

    TTL

    Pbfree Code

    No

    Subcategory

    FF/Latches

    JESD-30 Code

    R-PDSO-G14

    Package Code

    SOP

    Trigger Type

    NEGATIVE EDGE

    Logic IC Type

    J-K FLIP-FLOP

    Package Shape

    RECTANGULAR

    Package Style

    SMALL OUTLINE

    Surface Mount

    YES

    Terminal Form

    GULL WING

    Number of Bits

    2

    Packing Method

    TR

    Power Supplies

    5 V

    Terminal Pitch

    1.27 mm

    Output Polarity

    COMPLEMENTARY

    Part Package Code

    SOIC

    Seated Height-Max

    1.75 mm

    Temperature Grade

    COMMERCIAL

    Terminal Position

    DUAL

    Source Content uid

    SN74ALS113ADR

    Number of Functions

    2

    Number of Terminals

    14

    Package Description

    SOP, SOP14,.25

    Part Life Cycle Code

    Obsolete

    Qualification Status

    Not Qualified

    Load Capacitance (CL)

    50 pF

    Package Body Material

    PLASTIC/EPOXY

    Reach Compliance Code

    not_compliant

    Propagation Delay (tpd)

    19 ns

    Package Equivalence Code

    SOP14,.25

    Operating Temperature-Max

    70°C

    Operating Temperature-Min

    Supply Voltage-Max (Vsup)

    5.5 V

    Supply Voltage-Min (Vsup)

    4.5 V

    Supply Voltage-Nom (Vsup)

    5 V

    Peak Reflow Temperature (Cel)

    NOTSPECIFIED

    Power Supply Current-Max (ICC)

    4.5 mA

    Time@Peak Reflow Temperature-Max (s)

    NOTSPECIFIED

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