Width

7.62 mm

Family

AS

Length

19.305 mm

HTS Code

8542.39.00.01

ECCN Code

EAR99

Max I(ol)

0.008 A

Pin Count

14

Rohs Code

Yes

Brand Name

Texas Instruments

Popularity

63

Technology

TTL

Subcategory

Gates

JESD-30 Code

R-PDIP-T14

Package Code

DIP

Date Of Intro

1986-01-01

JESD-609 Code

e4

Logic IC Type

NAND GATE

Package Shape

RECTANGULAR

Package Style

IN-LINE

Surface Mount

NO

Terminal Form

THROUGH-HOLE

Packing Method

TUBE

Power Supplies

5 V

Terminal Pitch

2.54 mm

Schmitt Trigger

NO

Terminal Finish

Nickel/Palladium/Gold (Ni/Pd/Au)

Number of Inputs

8

Part Package Code

DIP

Seated Height-Max

5.08 mm

Temperature Grade

COMMERCIAL

Terminal Position

DUAL

Source Content uid

SN74AS30N

Number of Functions

1

Number of Terminals

14

Package Description

DIP, DIP14,.3

Prop. Delay@Nom-Sup

5 ns

Part Life Cycle Code

Active

Qualification Status

Not Qualified

Load Capacitance (CL)

50 pF

Package Body Material

PLASTIC/EPOXY

Reach Compliance Code

compliant

Output Characteristics

3-STATE

Propagation Delay (tpd)

5 ns

Package Equivalence Code

DIP14,.3

Operating Temperature-Max

70°C

Operating Temperature-Min

0°C

Supply Voltage-Max (Vsup)

5.5 V

Supply Voltage-Min (Vsup)

4.5 V

Supply Voltage-Nom (Vsup)

5 V

Peak Reflow Temperature (Cel)

NOTAPPLICABLE

Power Supply Current-Max (ICC)

4.9 mA

Time@Peak Reflow Temperature-Max (s)

NOTAPPLICABLE