PPAP

No

Bus Hold

No

Mounting

Through Hole

Polarity

Inverting

ECCN (US)

EAR99

Packaging

Tube

Pin Count

20

Automotive

No

Lead Shape

Through Hole

Output Type

3-State

PCB changed

20

Part Status

Active

Logic Family

ACT

Package Width

6.4

Logic Function

Buffer/Line Driver

Package Height

3.5

Package Length

25.1(Max)

Supplier Package

PDIP

Input Signal Type

Single-Ended

Process Technology

CMOS

Standard Package Name

DIP

Number of Inputs per Chip

8

Number of Outputs per Chip

8

Number of Channels per Chip

8

Number of Elements per Chip

2

Maximum Power Dissipation (mW)

500

Maximum Quiescent Current (uA)

8

Number of Input Enables per Chip

0

Number of Output Enables per Chip

2 Low

Maximum Operating Temperature (°C)

85

Minimum Operating Temperature (°C)

-40

Absolute Propagation Delay Time (ns)

10.5

Maximum Operating Supply Voltage (V)

5.5

Minimum Operating Supply Voltage (V)

4.5

Typical Operating Supply Voltage (V)

5

Maximum Low Level Output Current (mA)

24

Propagation Delay Test Condition (pF)

50

Maximum High Level Output Current (mA)

-24

Maximum Propagation Delay Time @ Maximum CL (ns)

8@5V