Width

5.3 mm

Family

LV/LV-A/LVX/H

Length

10.3 mm

Pin Count

14

Rohs Code

No

Popularity

0

Technology

CMOS

Pbfree Code

No

JESD-30 Code

R-PDSO-G14

Package Code

SOP

JESD-609 Code

e0

Logic IC Type

NAND GATE

Package Shape

RECTANGULAR

Package Style

SMALL OUTLINE

Surface Mount

YES

Terminal Form

GULL WING

Terminal Pitch

1.27 mm

Terminal Finish

TIN LEAD

Number of Inputs

2

Part Package Code

SOIC

Seated Height-Max

1.9 mm

Temperature Grade

INDUSTRIAL

Terminal Position

DUAL

Source Content uid

TC74LVX00FELP

Number of Functions

4

Number of Terminals

14

Package Description

0.300 INCH, EIAJ TYPE2, PLASTIC, SOP-14

Part Life Cycle Code

Active

Qualification Status

Not Qualified

Load Capacitance (CL)

50 pF

Package Body Material

PLASTIC/EPOXY

Reach Compliance Code

unknown

Propagation Delay (tpd)

11 ns

Operating Temperature-Max

85°C

Operating Temperature-Min

-40°C

Supply Voltage-Max (Vsup)

3.6 V

Supply Voltage-Min (Vsup)

2 V

Supply Voltage-Nom (Vsup)

3.3 V

Peak Reflow Temperature (Cel)

240

Time@Peak Reflow Temperature-Max (s)

NOTSPECIFIED