Width

1.2 mm

Family

AUP/ULP/V

Length

1.6 mm

Pin Count

5

Popularity

95

Pbfree Code

Yes

JESD-30 Code

R-PDSO-F5

Package Code

VSOF

JESD-609 Code

e3

Logic IC Type

NAND GATE

Package Shape

RECTANGULAR

Package Style

SMALL OUTLINE, VERY THIN PROFILE

Surface Mount

YES

Terminal Form

FLAT

Terminal Pitch

0.5 mm

Terminal Finish

MATTE TIN

Number of Inputs

2

Part Package Code

SOT

Seated Height-Max

0.6 mm

Temperature Grade

INDUSTRIAL

Terminal Position

DUAL

Number of Functions

1

Number of Terminals

5

Package Description

1.60 X 1.60 MM, 0.60 MM HEIGHT, ROHS COMPLIANT, SOT-553, 5 PIN

Part Life Cycle Code

Active

Qualification Status

COMMERCIAL

Package Body Material

PLASTIC/EPOXY

Reach Compliance Code

unknown

Propagation Delay (tpd)

9.9 ns

Operating Temperature-Max

85°C

Operating Temperature-Min

-40°C

Supply Voltage-Max (Vsup)

3.6 V

Supply Voltage-Min (Vsup)

0.9 V

Supply Voltage-Nom (Vsup)

3.3 V

Moisture Sensitivity Level

NOT SPECIFIED

Peak Reflow Temperature (Cel)

260

Time@Peak Reflow Temperature-Max (s)

40