HTS

8542.39.00.01

PPAP

No

Bus Hold

No

Mounting

Surface Mount

Polarity

Inverting/Non-Inverting

ECCN (US)

EAR99

Pin Count

14

Set/Reset

Set/Reset

Automotive

No

Lead Shape

Flat

PCB changed

14

Part Status

Active

Logic Family

ACT

Package Width

7.11(Max)

Logic Function

D-Type

Package Height

2.03(Max)

Package Length

9.78(Max)

Triggering Type

Positive-Edge

Supplier Package

CFPAK

Input Signal Type

Single-Ended

Process Technology

CMOS

Standard Package Name

FPAK

Number of Element Inputs

1

Number of Element Outputs

1

Supplier Temperature Grade

Military

Number of Channels per Chip

2

Number of Elements per Chip

2

Maximum Quiescent Current (mA)

1.6

Maximum Operating Temperature (°C)

125

Minimum Operating Temperature (°C)

-55

Absolute Propagation Delay Time (ns)

14

Maximum Operating Supply Voltage (V)

5.5

Minimum Operating Supply Voltage (V)

4.5

Typical Operating Supply Voltage (V)

5

Maximum Low Level Output Current (mA)

24

Propagation Delay Test Condition (pF)

50

Maximum High Level Output Current (mA)

-24

Maximum Propagation Delay Time @ Maximum CL (ns)

14@4.5V