HTS

8542.39.00.01

PPAP

No

Mounting

Through Hole

Polarity

Inverting

ECCN (US)

3A001.a.1.c

Packaging

Rail

Pin Count

16

Automotive

No

Lead Shape

Through Hole

PCB changed

16

Part Status

Obsolete

Logic Family

ACT

Package Width

7.87(Max)

Logic Function

Decoder/Demultiplexer

Package Height

4.57(Max)

Package Length

19.94(Max)

Supplier Package

CDIP

Process Technology

CMOS

Standard Package Name

DIP

Number of Element Inputs

3

Demultiplexing Capability

1-of-8

Number of Element Outputs

8

Supplier Temperature Grade

Military

Number of Elements per Chip

1

Maximum Quiescent Current (mA)

0.08

Maximum Operating Temperature (°C)

125

Minimum Operating Temperature (°C)

-55

Number of Input Enables per Element

3

Absolute Propagation Delay Time (ns)

14

Maximum Operating Supply Voltage (V)

5.5

Minimum Operating Supply Voltage (V)

4.5

Number of Output Enables per Element

0

Typical Operating Supply Voltage (V)

5

Maximum Low Level Output Current (mA)

24

Propagation Delay Test Condition (pF)

50

Maximum High Level Output Current (mA)

-24

Maximum Propagation Delay Time @ Maximum CL (ns)

12.5@5V