Power

YES

YTEOL

0

HTS Code

8542.33.00.01

Low-Bias

YES

Objectid

104971258

Wideband

NO

ECCN Code

EAR99

Risk Rank

9.49

Low-Offset

NO

Micropower

NO

Technology

CMOS

Architecture

VOLTAGE-FEEDBACK

JESD-30 Code

R-PDIP-T8

Package Code

DIP

Package Shape

RECTANGULAR

Package Style

IN-LINE

Slew Rate-Min

0.55 V/us

Surface Mount

NO

Terminal Form

THROUGH-HOLE

Amplifier Type

OPERATIONAL AMPLIFIER

Terminal Pitch

2.54 mm

Voltage Gain-Min

2200

Temperature Grade

COMMERCIAL

Terminal Position

DUAL

Programmable Power

NO

Source Content uid

TLV4111CPE4

Supply Current-Max

1.5 mA

Number of Functions

1

Number of Terminals

8

Package Description

DIP, DIP8,.3

Part Life Cycle Code

Obsolete

Qualification Status

Not Qualified

Package Body Material

PLASTIC/EPOXY

Reach Compliance Code

unknown

Frequency Compensation

YES

Input Offset Voltage-Max

4000 µV

Package Equivalence Code

DIP8,.3

Supply Voltage Limit-Max

7 V

Operating Temperature-Max

70°C

Operating Temperature-Min

Bias Current-Max (IIB) @25C

0.00005 µA